Multiport memories are well known devices that have multiple ports to enable parallel accesses to the memory, e.g., for simultaneous reading of a first memory location via a first port and writing of a second memory location via a second port. Typically, multiport memories find application particularly within data processing devices as register files or as caches. A register file is a temporary buffer for intermediate results and arguments produced and used by the functional parts of the data processing device. A cache is a high-speed storage coupled to a much slower and larger main storage for enabling fast access to part of the contents of the main storage loaded in advance into the cache. The cache being a high-speed memory takes advantage of the locality of references within computer programs to store data which is likely to be reused in the high-speed memory.
U.S. Pat. No. 5,189,640 issued to Huard discloses a cell of a multiport memory. The known cell includes a bistable element made up of cross-coupled inverters. The bistable element is connected to multiple pairs of read bit lines via multiple pairs of read switches, and to multiple pairs of write bit lines via multiple pairs of write switches. The read and write switches are controlled via read-enable lines and multiple write-enable lines.